By Dimitris Gizopoulos
This is a brand new kind of edited quantity within the Frontiers in digital trying out publication sequence dedicated to contemporary advances in digital circuits checking out. The booklet is a complete elaboration on vital subject matters which catch significant learn and improvement efforts at the present time. "Hot" themes of present curiosity to check know-how neighborhood were chosen, and the authors are key participants within the corresponding topics.
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Extra info for Advances in Electronic Testing: Challenges and Methodologies (Frontiers in Electronic Testing)
8 An explicit fault model is one where the faults can be enumerated. 16 Chapter 1 – Defect-Oriented Testing quality is always measured in terms of defects, while coverage can only be measured in terms of faults. But how do defects and faults relate to one another? It is sometimes desirable to use a simple model as a “surrogate” for a more complex model in order to quantify this relationship . Fault Diagnosis Fault models can be used as part of fault diagnosis and thus help find the root cause of defective chips.
Other circuit elements, such as vias and bulk, are also stressed, but oxide defects are the customary targets. In earlier generations of CMOS technology, gate oxides were not significantly stressed and power supply voltage was set primarily for TTL compatibility. Over the past few generations, however, shrinking geometries and higher performance requirements have mandated lower voltages, while I/O compatibility still favors higher voltages. 18 Dual gate oxide processes attempt to cover both contingencies, while still maintaining reasonable electric fields across the oxides.
If B had been 1 for the previous vector, then the output will be correct (logic 0). A Advances in Electronic Testing: Challenges and Methodologies 23 stuck-open fault requires a two-pattern test. The first sets up the fault by pulling the circuit output to a known value (applying A=B=0 sets Y to logic 1). The second pattern activates the fault (applying A=1 will not cause Y to change, hence a 1 will be observed rather than the expected 0). A B Y Gate permanently open Figure 1-18: N-transistor stuck-open.
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